The present invention relates in general to a parallel computer and more particularly to a system for generating object programs suited profitably for execution in parallel from a source program for serial execution described in a high level language.
Heretofore, in the parallel processing system such as a multiprocessor system, it is necessary for user to describe explicitly commands or instructions concerning, for example, the means for parallelization, activation of tasks, synchronization and others in a serial type source program as the user interface. In an article entitled "A Data Flow Approach to Multitasking On CRAY X-MP Computers" of "ACM-0-89791-174-1-12187-0107", pp. 107-114(1985), there are discussed a multitasking system in which four vector processors are operated in parallel and a method of commanding the multitasking operation by the user. To this end, the system is provided with a library in connection with the control of activation and synchronization of the tasks. The user is required to describe FORTRAN programs so that the library can be called for the purpose of reference. Besides, it is necessary at lower level to designate on a loop basis the means for parallelization in the form of a comment-type control statement.
In conjunction with the multiprocessor system, however, there is no proposal concerning the procedure for realizing automatically the parallelization, starting from the serial-type compile language.
On the other hand, in a parallel processing system such as shown in FIG. 2 of the accompanying drawings, the processing for executing instructions in each processor and data send processing and data receive processing among the processors are performed independently. This sort of system is described in detail in copending Japanese Patent Application No. 61-18236 filed on Aug. 1, 1986 (corresponding to U.S. patent application Ser. No. 078,656 filed on July 28, 1987). The contents of this preceding application is incorporated herein by reference. This parallel processing system features the following aspects:
(1) Referring to FIG. 2, the system of concern includes a host computer 121 and a parallel processing unit 122 which in turn is constituted by a plurality of processors 123 and a network 124 for enabling data transfer between given ones of the processors 123.
(2) Each processor 123 includes a local memory 125 for holding programs and data, an instruction processing unit 126 for executing instructions read out sequentially from the local memory 125, a sender unit 127 and a receiver unit 128.
(3) The data send processing is realized by executing a SEND instruction. When the SEND instruction is decoded, a transfer destination processor number, a data identifier and a data are placed in a register 132 incorporated in the sender unit 127 from the register designated by the operand resulting from the decoding of the SEND instruction. These three species of information of the register 132 is sent onto the network 124 as a message. The message on the network 124 is fetched as a set of the data identifier 130 and the data 131 by a reception buffer 129 incorporated in the receiver part of the processor which is identified by the transfer destination processor number contained in the message.
(4) The data receive processing is realized by executing a RECEIVE instruction. Upon decoding of the RECEIVE instruction, an identifier for retrieval is read out from a register designated by an operand resulting from the decoding, which identifier is then sent to the receiver part 128, wherein a data identifier coinciding with the identifier for the retrieval is searched from the reception buffer 129. Unless the coincident data identifier is present, arrival of the data identifier for which coincidence can occur is awaited. In case the coincident data identifier is present, this fact is informed to the instruction processing unit 126, which responds thereto by fetching the corresponding data.
Since the send processing and the receive processing are executed independent of each other, it is important to ensure definiteness or identity of the data identifier.
It is difficult to determine the data identifier only from the static structure of program. Dynamic structure of the program has to be taken into consideration.
However, there has been made no proposals concerning the procedure for automatically generating the data identifier in realizing automatic parallelization of the serial type compile language for the parallel computer.
In the prior art system described above, no consideration is paid to the automatic generation and parallelization of the data identifier for hardware capable of performing the parallel processing. Accordingly, the user is necessarily forced to perform the program transformation by devising the means for parallel processing and incorporating it explicitly in the program. Accordingly, any serial-type programs which are in possession of the user as resources can not be executed in parallel in the forms as they are, but recording of the programs so as to be oriented for the parallel processing as well as debugging is required. Moreover, every time the characteristics of hardware are changed, the instructions for the parallelization must be correspondingly altered in order to ensure valid utilization of the resource or otherwise the resources can not run on the other systems, giving rise problems in respect to the general utilization of the user programs.